ST7FOXK1 STMicroelectronics, ST7FOXK1 Datasheet - Page 116

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ST7FOXK1

Manufacturer Part Number
ST7FOXK1
Description
Low cost flash 8bit micro
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7FOXK1

4 To 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
1K write/erase cycles guaranteed Data retention
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wakeup from Halt, Wait and Slow
A/d Converter
up to 10 input channels

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On-chip peripherals
Table 41.
116/226
Address
(Hex.)
0C
0D
0E
0F
10
Reset Value
Reset Value
Reset Value
Reset Value
Reset Value
Bit 5 = TB Timebase period selection bit
Bit 4 = TB1IE Timebase Interrupt enable bit
Bit 3 = TB1F Timebase Interrupt flag
Bits 2:0 = Reserved, must be kept cleared.
Lite Timer Input Capture register (LTICR)
Reset value: 0000 0000 (00h)
Bits 7:0 = ICR[7:0] Input Capture value
These bits are read by software and cleared by hardware after a reset. If the ICF bit in the
LTCSR is cleared, the value of the 8-bit up-counter will be captured when a rising or falling
edge occurs on the LTIC pin.
Lite Timer register mapping and reset values
Register
LTCNTR
LTCSR2
LTCSR1
LTARR
LTICR
label
ICR7
This bit is set and cleared by software.
0: Timebase period = t
1: Timebase period = t
This bit is set and cleared by software.
0: Timebase (TB1) interrupt disabled
1: Timebase (TB1) interrupt enabled
This bit is set by hardware and cleared by software reading the LTCSR register. Writing
to this bit has no effect.
0: No counter overflow
1: A counter overflow has occurred
7
CNT7
ICR7
AR7
ICIE
ICR6
7
0
0
0
0
0
CNT6
ICR6
AR6
ICF
6
0
0
0
0
x
ICR5
OSC
OSC
* 8000 (1 ms @ 8 MHz)
* 16000 (2 ms @ 8 MHz)
CNT5
ICR5
AR5
TB
5
0
0
0
0
0
ICR4
Read only
TB1IE
CNT4
ICR4
AR4
4
0
0
0
0
0
ICR3
CNT3
TB1F
ST7FOXF1, ST7FOXK1, ST7FOXK2
ICR3
AR3
3
0
0
0
0
0
ICR2
CNT2
ICR2
AR2
2
0
0
0
0
0
ICR1
TB2IE
CNT1
ICR1
AR1
1
0
0
0
0
0
ICR0
CNT0
TB2F
ICR0
AR0
0
0
0
0
0
0
0

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