ST7FOXK1 STMicroelectronics, ST7FOXK1 Datasheet - Page 64
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ST7FOXK1
Manufacturer Part Number
ST7FOXK1
Description
Low cost flash 8bit micro
Manufacturer
STMicroelectronics
Datasheet
1.ST7FOXK1.pdf
(226 pages)
Specifications of ST7FOXK1
4 To 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
1K write/erase cycles guaranteed Data retention
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wakeup from Halt, Wait and Slow
A/d Converter
up to 10 input channels
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Power saving modes
8.4.1
Caution:
64/226
Active-halt mode
Active-Halt mode is the lowest power consumption mode of the MCU with a real-time clock
available. It is entered by executing the ‘HALT’ instruction when active halt mode is enabled.
The MCU can exit Active-Halt mode on reception of a Lite timer/ AT timer interrupt or a
Reset.
When entering Active-Halt mode, the I bit in the CC register is cleared to enable interrupts.
Therefore, if an interrupt is pending, the MCU wakes up immediately.
In Active-Halt mode, only the main oscillator and the selected timer counter (LT/AT) are
running to keep a wakeup time base. All other peripherals are not clocked except those
which get their clock supply from another clock generator (such as external or auxiliary
oscillator).
As soon as Active-Halt is enabled, executing a HALT instruction while the Watchdog is
active does not generate a Reset if the WDGHALT bit is reset.
This means that the device cannot spend more than a defined delay in this power saving
mode.
Figure 25. Active-halt timing overview
1. This delay occurs only if the MCU exits Active-Halt mode by means of a RESET.
[Active Halt Enabled]
When exiting Active-Halt mode by means of a Reset, a 256 CPU cycle delay occurs.
After the start up delay, the CPU resumes operation by fetching the Reset vector which
woke it up (see
When exiting Active-Halt mode by means of an interrupt, the CPU immediately
resumes operation by servicing the interrupt vector which woke it up (see
Figure
INSTRUCTION
RUN
HALT
ACTIVE
26).
HALT
CYCLE DELAY
INTERRUPT
256 CPU
RESET
OR
1)
VECTOR
FETCH
RUN
ST7FOXF1, ST7FOXK1, ST7FOXK2
Figure
26).
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