ST7FOXK1 STMicroelectronics, ST7FOXK1 Datasheet - Page 196
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ST7FOXK1
Manufacturer Part Number
ST7FOXK1
Description
Low cost flash 8bit micro
Manufacturer
STMicroelectronics
Datasheet
1.ST7FOXK1.pdf
(226 pages)
Specifications of ST7FOXK1
4 To 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
1K write/erase cycles guaranteed Data retention
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wakeup from Halt, Wait and Slow
A/d Converter
up to 10 input channels
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FOXK1T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
ST7FOXK1T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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Electrical characteristics
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Figure 83. SPI slave timing diagram with CPHA=0
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Figure 84. SPI slave timing diagram with CPHA=1
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
MISO
MOSI
MISO
MOSI
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
OUTPUT
INPUT
INPUT
SS
CPHA=0
CPOL=0
CPHA=0
CPOL=1
OUTPUT
INPUT
INPUT
see
note 2
t
a(SO)
see note 2
t
su(SS)
HZ
t
a(SO)
t
su(SS)
t
t
t
w(SCKH)
w(SCKL)
su(SI)
t
su(SI)
MSB IN
t
t
MSB IN
w(SCKH)
w(SCKL)
MSB OUT
MSB OUT
t
h(SI)
t
t
h(SI)
c(SCK)
t
c(SCK)
t
v(SO)
t
v(SO)
DD
DD
BIT6 OUT
BIT6 OUT
and 0.7xV
and 0.7xV
ST7FOXF1, ST7FOXK1, ST7FOXK2
BIT1 IN
BIT1 IN
DD
DD
t
h(SO)
t
h(SO)
t
t
r(SCK)
f(SCK)
t
t
r(SCK)
f(SCK)
LSB IN
LSB OUT
LSB IN
LSB OUT
t
h(SS)
t
h(SS)
t
dis(SO)
t
dis(SO)
note 2
see
note 2
see
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