ST7FOXK1 STMicroelectronics, ST7FOXK1 Datasheet - Page 208

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ST7FOXK1

Manufacturer Part Number
ST7FOXK1
Description
Low cost flash 8bit micro
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7FOXK1

4 To 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
1K write/erase cycles guaranteed Data retention
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wakeup from Halt, Wait and Slow
A/d Converter
up to 10 input channels

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Electrical characteristics
208/226
Figure 90. RESET pin protection when LVD is disabled
1. The reset network protects the device against parasitic resets.
2. Please refer to
The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad.
Otherwise the device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin
can go below the V
taken into account internally.
Because the reset circuit is designed to allow the internal Reset to be output in the RESET pin, the user
must ensure that the current sunk on the RESET pin is less than the absolute maximum value specified for
I
INJ(RESET)
Required
EXTERNAL
CIRCUIT
RESET
USER
in
Section Table 67. on page
Section 11.2.1 on page 184
IL
0.01µF
max. level specified in
189.
for more details on illegal opcode reset conditions.
V
Section 12.10.1 on page
DD
R
ON
Filter
GENERATOR
PULSE
ST7FOXF1, ST7FOXK1, ST7FOXK2
206. Otherwise the reset will not be
WATCHDOG
ILLEGAL OPCODE
INTERNAL
RESET
ST7XXX

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