ST7FOXK1 STMicroelectronics, ST7FOXK1 Datasheet - Page 98
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ST7FOXK1
Manufacturer Part Number
ST7FOXK1
Description
Low cost flash 8bit micro
Manufacturer
STMicroelectronics
Datasheet
1.ST7FOXK1.pdf
(226 pages)
Specifications of ST7FOXK1
4 To 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
1K write/erase cycles guaranteed Data retention
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wakeup from Halt, Wait and Slow
A/d Converter
up to 10 input channels
Available stocks
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Part Number
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Quantity
Price
Company:
Part Number:
ST7FOXK1T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
ST7FOXK1T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
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On-chip peripherals
10.2.6
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Register description
Timer control status register (ATCSR)
Reset value: 0x00 0000 (x0h)
Bit 7 = Reserved
Bit 6 = ICF Input Capture flag
Bit 5 = ICIE IC Interrupt Enable bit
Bits 4:3 = CK[1:0] Counter Clock Selection bits
Table 37.
Bit 2 = OVF1 Overflow flag
Bit 1 = OVFIE1 Overflow Interrupt Enable bit
This Bit is set by hardware and cleared by software by reading the ATICR register (a
read access to ATICRH or ATICRL clears this flag). Writing to this bit does not change
the bit value.
0: No input capture
1: An input capture has occurred
This bit is set and cleared by software.
0: Input Capture Interrupt Disabled
1: Input Capture Interrupt Enabled
These bits are set and cleared by software and cleared by hardware after a reset. they
select the clock frequency of the counter.
This bit is set by hardware and cleared by software by reading the ATCSR register. It
indicates the transition of the Counter1 CNTR1 from FFFh to ATR1 value.
0: No Counter Overflow Occurred
1: Counter Overflow Occurred
This bit is read/write by software and cleared by hardware after a reset.
0: Overflow Interrupt Disabled.
1: Overflow Interrupt Enabled.
7
0
Counter clock selection
ICF
f
LTIMER
Counter clock selection
selection forbidden
(1 ms timebase @ 8 MHz)
ICIE
OFF
f
CPU
CK1
Read / Write
CK0
ST7FOXF1, ST7FOXK1, ST7FOXK2
OVF1
OVFIE1
CK1
1
0
0
1
CMPIE
CK0
0
1
1
0
0
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