TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 191

• Manufacturer Part Number: TMP91xy40FG
• Manufacturer: Toshiba

Specifications of TMP91xy40FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/F
• Rom Combinations: 128
• Ram Combinations: 4
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 4
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 3
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 61
• Power Supply Voltage(v): 2.2 to 3.6

3.17
3.17.1
Internal reset
Watchdog Timer (WDT)
Configuration
level of external
(f
the system in the event of software or system lockups due to spurious noise, etc. When a
watchdog timer time-out occurs, the watchdog timer generates a nonmaskable interrupt to the
CPU.
FPH
Connecting the watchdog timer output to the reset pin internally enables a forced reset. (The
The TMP91CW40 contains a watchdog timer. The watchdog timer is used to regain control of
f
SYS
Noise: Careful consideration must be given in designing a system because the watchdog timer may not be able to realize
/2)
Figure 3.17.1 shows a block diagram of the watchdog timer.
its full functionality due to external noise, etc.
WDMOD
<WDTP1:0>
RESET
22-stage binary counter
Figure 3.17.1 Watchdog Timer Block Diagram
pin is not changed.)
2
15
Watchdog timer control register
2
17
Selector
Write of
4EH
2
Internal data bus
Reset
19
91CW40-189
2
WDCR
21
Write of
B1H
WDMOD<RESCR>
R
WDMOD<WDTE>
Reset control
Q
S
Interrupt request
INTWD
Internal reset
RESET
TMP91CW40
2008-09-19
pin