MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 20

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MCP1726T-ADJZEMF

Manufacturer Part Number
MCP1726T-ADJZEMF
Description
Regulator, Extended Industrial, HVSON, 8-Pin|
Manufacturer
Microchip Technology
Datasheet
PIC12F683
2.4
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF
register. Any instruction using the INDF register
actually accesses data pointed to by the File Select
Register (FSR). Reading INDF itself indirectly will
produce 00h. Writing to the INDF register indirectly
results in a no operation (although Status bits may be
affected). An effective 9-bit address is obtained by
concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 2-4.
FIGURE 2-4:
DS41211A-page 18
BANK SELECT
RP1
For memory map detail see Figure 2-2.
Note 1:
(1)
Indirect Addressing, INDF and
FSR Registers
RP0
DIRECT ADDRESSING
6
The RP1 and IRP bits are reserved; always maintain these bits clear.
DATA
MEMORY
LOCATION SELECT
DIRECT/INDIRECT ADDRESSING PIC12F683
FROM OPCODE
7FH
00H
BANK 0
00
0
Advance Information
BANK 1
01
BANK 2
10
NOT USED
A simple program to clear RAM location 20h-2Fh using
indirect addressing is shown in Example 2-1.
EXAMPLE 2-1:
NEXT
CONTINUE
BANK 3
11
IRP
MOVLW
MOVWF
CLRF
INCF
BTFSS
GOTO
BANK SELECT
(1)
180H
1FFH
0x20
FSR
INDF
FSR
FSR,4
NEXT
7
INDIRECT ADDRESSING
INDIRECT ADDRESSING
 2003 Microchip Technology Inc.
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
FSR REGISTER
LOCATION SELECT
0

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