MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 67
MCP1726T-ADJZEMF
Manufacturer Part Number
MCP1726T-ADJZEMF
Description
Regulator, Extended Industrial, HVSON, 8-Pin|
Manufacturer
Microchip Technology
Datasheet
1.MCP1726T-ADJZEMF.pdf
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10.1.5
The A/D conversion is initiated by setting the
GO/DONE bit (ADCON0<1>). When the conversion is
complete, the A/D module:
• Clears the GO/DONE bit
• Sets the ADIF flag (PIR1<6>)
• Generates an interrupt (if enabled)
If the conversion must be aborted, the GO/DONE bit
can be cleared in software. The ADRESH:ADRESL
registers will not be updated with the partially complete
FIGURE 10-2:
10.1.6
The A/D conversion can be supplied in two formats: left
or right shifted. The ADFM bit (ADCON0<7>) controls
the output format. Figure 10-3 shows the output
formats.
FIGURE 10-3:
2003 Microchip Technology Inc.
(ADFM = 0)
(ADFM = 1)
STARTING A CONVERSION
CONVERSION OUTPUT
T
CY
Set GO bit
Holding Capacitor is Disconnected from Analog Input (typically 100 ns)
to T
AD
Conversion Starts
A/D CONVERSION T
10-BIT A/D RESULT FORMAT
MSB
bit 7
bit 7
T
AD
Unimplemented: Read as ‘0’
1
T
AD
b9
2
T
AD
b8
ADRESH
3
T
Advance Information
10-bit A/D Result
AD
b7
AD
4
CYCLES
T
AD
b6
5
MSB
T
AD
b5
6
bit 0
bit 0
A/D
ADRESH:ADRESL registers will retain the value of the
previous conversion. After an aborted conversion, a
2 T
be initiated. Following the delay, an input acquisition is
automatically started on the selected channel.
ADRESH and ADRESL registers are Loaded,
GO bit is Cleared,
ADIF bit is Set,
Holding Capacitor is Connected to Analog Input
T
AD
b4
Note:
AD
7
delay is required before another acquisition can
T
AD
b3
bit 7
bit 7
conversion
8
The GO/DONE bit should not be set in the
same instruction that turns on the A/D.
10-bit A/D Result
LSB
T
AD
b2
9
T
AD
b1
Unimplemented: Read as ‘0’
10 T
sample.
ADRESL
PIC12F683
AD
b0
11
DS41211A-page 65
Instead,
bit 0
LSB
bit 0
the
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