MCP1726T-ADJZEMF Microchip Technology, MCP1726T-ADJZEMF Datasheet - Page 36

• Manufacturer Part Number: MCP1726T-ADJZEMF
• Description: Regulator, Extended Industrial, HVSON, 8-Pin|
• Manufacturer: Microchip Technology

PIC12F683
REGISTER 4-2:
REGISTER 4-3:
DS41211A-page 34
bit 7-6:
bit 5-0:
bit 7-6
bit 5-4
bit 3
bit 2-0
TRISIO — GPIO TRISTATE REGISTER (ADDRESS: 85h)
WPU — WEAK PULL-UP REGISTER (ADDRESS: 95h)
bit 7
bit 7
Unimplemented: Read as ‘0’
TRISIO<5:0>: GPIO Tri-State Control bit
1 = GPIO pin configured as an input (tri-stated)
0 = GPIO pin configured as an output
Note 1:
Unimplemented: Read as ‘0’
WPU<5:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
WPU<2:0>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Note 1:
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
U-0
U-0
—
—
2:
2:
3:
4:
TRISIO<3> always reads ‘1’.
TRISIO<5:4> reads ‘1’ in XT, LP and HS modes.
Global GPPU must be enabled for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in Output mode
(TRISIO = 0).
The GP3 pull-up is enabled when configured as MCLR and disabled as an I/O in
the configuration word.
WPU<5:4> reads ‘1’ in XT, LP and HS modes.
U-0
U-0
—
—
Advance Information
TRISIO5
R/W-1
R/W-1
WPU5
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TRISIO4
R/W-1
WPU4
R/W-1
TRISIO3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
R-1
R/W-1
WPU2
TRISIO2 TRISIO1
R/W-1
 2003 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
WPU1
R/W-1
R/W-1
TRISIO0
WPU0
R/W-1
R/W-1
bit 0
bit 0