LM3S1911-IRN20-A0T Luminary Micro, Inc., LM3S1911-IRN20-A0T Datasheet - Page 16
![no-image](/images/no-image-200.jpg)
LM3S1911-IRN20-A0T
Manufacturer Part Number
LM3S1911-IRN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S1911-IRN20-A0T.pdf
(426 pages)
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Table of Contents
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Analog Comparators ................................................................................................................... 365
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
16
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Analog Comparator Masked Interrupt Status (ACMIS), offset 0x00 .................................... 370
Analog Comparator Raw Interrupt Status (ACRIS), offset 0x04 ......................................... 371
Analog Comparator Interrupt Enable (ACINTEN), offset 0x08 ........................................... 372
Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x10 ......................... 373
Analog Comparator Status 0 (ACSTAT0), offset 0x20 ....................................................... 374
Analog Comparator Status 1 (ACSTAT1), offset 0x40 ....................................................... 374
Analog Comparator Control 0 (ACCTL0), offset 0x24 ....................................................... 375
Analog Comparator Control 1 (ACCTL1), offset 0x44 ....................................................... 375
2
2
2
2
2
2
2
2
2
2
C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ........................................... 353
C Master Interrupt Clear (I2CMICR), offset 0x01C ......................................................... 354
C Master Configuration (I2CMCR), offset 0x020 ............................................................ 355
C Slave Own Address (I2CSOAR), offset 0x000 ............................................................ 357
C Slave Control/Status (I2CSCSR), offset 0x004 ........................................................... 358
C Slave Data (I2CSDR), offset 0x008 ........................................................................... 360
C Slave Interrupt Mask (I2CSIMR), offset 0x00C ........................................................... 361
C Slave Raw Interrupt Status (I2CSRIS), offset 0x010 ................................................... 362
C Slave Masked Interrupt Status (I2CSMIS), offset 0x014 .............................................. 363
C Slave Interrupt Clear (I2CSICR), offset 0x018 ............................................................ 364
Preliminary
October 09, 2007
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