LM3S1911-IRN20-A0T Luminary Micro, Inc., LM3S1911-IRN20-A0T Datasheet - Page 38

• Manufacturer Part Number: LM3S1911-IRN20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Memory Map
3
Table 3-1. Memory Map
38
Start
Memory
0x0000.0000
0x2000.0000
0x2010.0000
0x2200.0000
0x2400.0000
FiRM Peripherals
0x4000.0000
0x4000.4000
0x4000.5000
0x4000.6000
0x4000.7000
0x4000.8000
0x4000.9000
0x4000.C000
0x4000.D000
0x4000.E000
Peripherals
0x4002.0000
0x4002.0800
0x4002.1000
0x4002.1800
0x4002.4000
0x4002.5000
0x4002.6000
0x4002.7000
0x4003.0000
0x4003.1000
0x4003.2000
0x4003.3000
0x4003.C000
Memory Map
The memory map for the LM3S1911 controller is provided in Table 3-1 on page 38.
In this manual, register addresses are given as a hexadecimal increment, relative to the module’s
base address as shown in the memory map. See also Chapter 4, “Memory Map” in the ARM®
Cortex™-M3 Technical Reference Manual.
Important:
In Table 3-1 on page 38, addresses not listed are reserved.
a
End
0x0003.FFFF
0x2000.FFFF
0x21FF.FFFF
0x23FF.FFFF
0x3FFF.FFFF
0x4000.0FFF
0x4000.4FFF
0x4000.5FFF
0x4000.6FFF
0x4000.7FFF
0x4000.8FFF
0x4000.9FFF
0x4000.CFFF
0x4000.DFFF
0x4000.EFFF
0x4002.07FF
0x4002.0FFF
0x4002.17FF
0x4002.1FFF
0x4002.4FFF
0x4002.5FFF
0x4002.6FFF
0x4002.7FFF
0x4003.0FFF
0x4003.1FFF
0x4003.2FFF
0x4003.3FFF
0x4003.CFFF
Description
On-chip flash
Bit-banded on-chip SRAM
Reserved non-bit-banded SRAM space
Bit-band alias of 0x2000.0000 through 0x200F.FFFF
Reserved non-bit-banded SRAM space
Watchdog timer
GPIO Port A
GPIO Port B
GPIO Port C
GPIO Port D
SSI0
SSI1
UART0
UART1
UART2
I2C Master 0
I2C Slave 0
I2C Master 1
I2C Slave 1
GPIO Port E
GPIO Port F
GPIO Port G
GPIO Port H
Timer0
Timer1
Timer2
Timer3
Analog Comparators
Preliminary
b
c
October 09, 2007
For details on
registers, see
page ...
133
133
-
129
-
231
158
158
158
158
304
304
259
259
259
343
356
343
356
158
158
158
158
204
204
204
204
365