LM3S1911-IRN20-A0T Luminary Micro, Inc., LM3S1911-IRN20-A0T Datasheet - Page 5

• Manufacturer Part Number: LM3S1911-IRN20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

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10.1
10.2
10.2.1 GPTM Reset Conditions .......................................................................................................... 194
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 194
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 196
10.3
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 200
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 201
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 201
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 202
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 202
10.3.6 16-Bit PWM Mode ................................................................................................................... 203
10.4
10.5
11
11.1
11.2
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Transmit/Receive Logic ........................................................................................................... 253
12.2.2 Baud-Rate Generation ............................................................................................................. 254
12.2.3 Data Transmission .................................................................................................................. 255
12.2.4 Serial IR (SIR) ......................................................................................................................... 255
12.2.5 FIFO Operation ....................................................................................................................... 256
12.2.6 Interrupts ................................................................................................................................ 256
12.2.7 Loopback Operation ................................................................................................................ 257
12.2.8 IrDA SIR block ........................................................................................................................ 257
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Bit Rate Generation ................................................................................................................. 294
13.2.2 FIFO Operation ....................................................................................................................... 294
13.2.3 Interrupts ................................................................................................................................ 294
13.2.4 Frame Formats ....................................................................................................................... 295
13.3
13.4
13.5
14
14.1
October 09, 2007
General-Purpose Timers ................................................................................................. 193
Block Diagram ........................................................................................................................ 194
Functional Description ............................................................................................................. 194
Initialization and Configuration ................................................................................................. 200
Register Map .......................................................................................................................... 203
Register Descriptions .............................................................................................................. 204
Watchdog Timer ............................................................................................................... 229
Block Diagram ........................................................................................................................ 229
Functional Description ............................................................................................................. 229
Initialization and Configuration ................................................................................................. 230
Register Map .......................................................................................................................... 230
Register Descriptions .............................................................................................................. 231
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 252
Block Diagram ........................................................................................................................ 253
Functional Description ............................................................................................................. 253
Initialization and Configuration ................................................................................................. 257
Register Map .......................................................................................................................... 258
Register Descriptions .............................................................................................................. 259
Synchronous Serial Interface (SSI) ................................................................................ 293
Block Diagram ........................................................................................................................ 293
Functional Description ............................................................................................................. 293
Initialization and Configuration ................................................................................................. 302
Register Map .......................................................................................................................... 303
Register Descriptions .............................................................................................................. 304
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 330
2
C) Interface ............................................................................ 330
Preliminary
LM3S1911 Microcontroller
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