LM3S1911-IRN20-A0T Luminary Micro, Inc., LM3S1911-IRN20-A0T Datasheet - Page 65

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LM3S1911-IRN20-A0T

Manufacturer Part Number
LM3S1911-IRN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Raw Interrupt Status (RIS)
Base 0x400F.E000
Offset 0x050
Type RO, reset 0x0000.0000
October 09, 2007
Reset
Reset
Type
Type
Bit/Field
31:7
5:2
6
1
0
RO
RO
31
15
0
0
Register 4: Raw Interrupt Status (RIS), offset 0x050
Central location for system control raw interrupts. These are set and cleared by hardware.
RO
RO
30
14
0
0
reserved
PLLLRIS
reserved
reserved
BORRIS
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
RO
RO
RO
26
10
0
0
Reset
0
0
0
0
0
RO
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PLL Lock Raw Interrupt Status
This bit is set when the PLL T
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Brown-Out Reset Raw Interrupt Status
This bit is the raw interrupt status for any brown-out conditions. If set,
a brown-out condition is currently active. This is an unregistered signal
from the brown-out detection circuit. An interrupt is reported if the BORIM
bit in the IMC register is set and the BORIOR bit in the PBORCTL register
is cleared.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
PLLLRIS
RO
RO
22
0
6
0
RO
RO
21
0
5
0
READY
RO
RO
20
0
4
0
reserved
Timer asserts.
LM3S1911 Microcontroller
RO
RO
19
0
3
0
RO
RO
18
0
2
0
BORRIS
RO
RO
17
0
1
0
reserved
RO
RO
16
0
0
0
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