FDC37B77X SMSC Corporation, FDC37B77X Datasheet - Page 100

• Manufacturer Part Number: FDC37B77X
• Description: ENHANCED SUPER I/O CONTROLLER WITH WAKE UP FEATURES
• Manufacturer: SMSC Corporation

Data Compression
The ECP port supports run length encoded
(RLE) decompression in hardware and can
transfer compressed data to a peripheral. Run
length encoded (RLE) compression in hardware
is not supported. To transfer compressed data
in ECP mode, the compression count is written
to the ecpAFifo and the data byte is written to
the ecpDFifo.
Compression is accomplished by counting
identical bytes and transmitting an RLE byte
that indicates how many times the next byte is
to be repeated.
intercepts the RLE byte and repeats the
following byte the specified number of times.
When a run-length count is received from a
peripheral,
replicated the specified number of times. A
run-length count of zero specifies that only one
byte of data is represented by the next data
byte, whereas a run-length count of 127
indicates that the next byte should be expanded
to 128 bytes. To prevent data expansion,
however, run-length counts of zero should be
avoided.
the
subsequent
Decompression simply
Reverse Channel Commands (PeripAck Low)
Forward Channel Commands (HostAck Low)
D7
0
1
data
Run-Length Count (0-127)
(mode 0011 0X00 only)
Channel Address (0-127)
byte
Table 40 -
is
100
D[6:0]
Pin Definition
The drivers for nStrobe, nAutoFd, nInit and
nSelectIn are open-collector in mode 000 and
are push-pull in all other modes.
ISA Connections
The interface can never stall causing the host to
hang. The width of data transfers is strictly
controlled on an I/O address basis per this
specification. All FIFO-DMA transfers are byte
wide, byte aligned and end on a byte boundary.
(The PWord value can be obtained by reading
Configuration Register A, cnfgA, described in
the next section).
are always possible with standard or PS/2 mode
using program control of the control signals.
Interrupts
The interrupts are enabled by serviceIntr in the
ecr register.
serviceIntr = 1 Disables the DMA and all of the
serviceIntr = 0
service interrupts.
Enables the selected interrupt
condition.
condition is valid, then the
interrupt
immediately when this bit is
changed from a 1 to a 0. This
can occur during Programmed
I/O if the number of bytes
Single byte wide transfers
If the interrupting
is
generated