FDC37B77X SMSC Corporation, FDC37B77X Datasheet - Page 38

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FDC37B77X

Manufacturer Part Number
FDC37B77X
Description
ENHANCED SUPER I/O CONTROLLER WITH WAKE UP FEATURES
Manufacturer
SMSC Corporation
Datasheet
NCN
ND
OW
PCN
POLL
PRETRK
R
RCN
SC
SK
SRT
ST0
ST1
ST2
ST3
SYMBOL
New Cylinder
Number
Non-DMA Mode
Flag
Overwrite
Present Cylinder
Number
Polling Disable
Precompensation
Start Track
Number
Sector Address
Relative Cylinder
Number
Number of
Sectors Per Track
Skip Flag
Step Rate Interval The time interval between step pulses issued by the FDC.
Status 0
Status 1
Status 2
Status 3
NAME
Table 17 - Description of Command Symbols
The desired cylinder number.
When set to 1, indicates that the FDC is to operate in the non-
DMA mode. In this mode, the host is interrupted for each data
transfer.
interfacing to a DMA controller by means of the DRQ and nDACK
signals.
The bits D0-D3 of the Perpendicular Mode Command can only be
modified if OW is set to 1. OW id defined in the Lock command.
The current position of the head at the completion of Sense
Interrupt Status command.
When set, the internal polling routine is disabled. When clear,
polling is enabled.
Programmable from track 00 to FFH.
The sector number to be read or written. In multi-sector transfers,
this parameter specifies the sector number of the first sector to be
read or written.
Relative cylinder offset from present cylinder as used by the
Relative Seek command.
The number of sectors per track to be initialized by the Format
command. The number of sectors per track to be verified during a
Verify command when EC is set.
When set to 1, sectors containing a deleted data address mark will
automatically be skipped during the execution of Read Data. If
Read Deleted is executed, only sectors with a deleted address
mark will be accessed. When set to "0", the sector is read or
written the same as the read and write commands.
Programmable from 0.5 to 8 milliseconds in increments of 0.5 ms
at the 1 Mbit data rate. Refer to the SPECIFY command for actual
delays.
Registers within the FDC which store status information after a
command has been executed. This status information is available
to the host during the result phase after command execution.
When set to 0, the FDC operates in DMA mode,
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DESCRIPTION

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