mcf5274l Freescale Semiconductor, Inc, mcf5274l Datasheet - Page 22

• Manufacturer Part Number: mcf5274l
• Description: Mcf5275 Integrated Microprocessor Family Hardware
• Manufacturer: Freescale Semiconductor, Inc

Signal Descriptions
4.1
Table 3
4.2
Table 4
22
Reset In
Reset Out
describes signals that are used to either reset the chip or as a reset indication.
describes signals that are used to support the on-chip clock generation circuitry.
Signal Name
Reset Signals
PLL and Clock Signals
NOTES:
1
2
Refers to pin’s primary function. All pins which are configurable for GPIO have a pullup
enabled in GPIO mode with the exception of PBUSCTL[7], PBUSCTL[4:0], PADDR,
PBS, PSDRAM.
If JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The GPIO
module is not responsible for assigning these pins.
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 1.1
SD_VDD
VDDPLL
VSSPLL
OVDD
Name
OVSS
VDD
VSS
RESET
RSTOUT
Abbreviation
Table 2. Signal Information and Muxing (continued)
GPIO
Port
—
—
—
—
—
—
—
Primary reset input to the device. Asserting RESET immediately
resets the CPU and peripherals.
Driven low for 128 CPU clocks when the soft reset bit of the system
configuration register (SCR[SOFTRST]) is set. It is driven low for 32K
CPU clocks when the software watchdog timer times out or when a
low input level is applied to RESET.
Table 3. Reset Signals
Alternate1
Preliminary
—
—
—
—
—
—
—
Alternate2 Dir.
—
—
—
—
—
—
—
Function
I
I
I
I
I
I
I
1
1
1
Freescale Semiconductor
1
1
I/O
O
I