mcf5274l Freescale Semiconductor, Inc, mcf5274l Datasheet - Page 63
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mcf5274l
Manufacturer Part Number
mcf5274l
Description
Mcf5275 Integrated Microprocessor Family Hardware
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5274L.pdf
(76 pages)
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10.11 Fast Ethernet AC Timing Specifications
MII signals use TTL signal levels compatible with devices operating at either 5.0 V or 3.3 V.
10.11.1MII Receive Signal Timing (FECn_RXD[3:0], FECn_RXDV,
The receiver functions correctly up to a FECn_RXCLK maximum frequency of 25 MHz +1%. There is no
minimum frequency requirement. In addition, the processor clock frequency must exceed twice the
FECn_RXCLK frequency.
Table 54
Figure 17
Freescale Semiconductor
Num
Configuration Overrides
1. Refer to the Coldfire Integration Module (CIM) section for more information.
M1
M2
M3
M4
(RCON, Override pins])
lists MII receive channel timings.
shows MII receive signal timings listed in
FECn_RXER, and FECn_RXCLK)
FECn_RXD[3:0], FECn_RXDV, FECn_RXER to
FECn_RXCLK setup
FECn_RXCLK to FECn_RXD[3:0], FECn_RXDV,
FECn_RXER hold
FECn_RXCLK pulse width high
FECn_RXCLK pulse width low
RSTOUT
CLKOUT
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 1.1
RESET
1
:
Figure 16. RESET and Configuration Override Timing
R1
Characteristic
Table 54. MII Receive Signal Timing
R3
Preliminary
Table
R2
54.
R4
5
5
35%
35%
R5
Min
Preliminary Electrical Characteristics
—
—
65%
65%
Max
R6
ns
ns
FECn_RXCLK
period
FECn_RXCLK
period
R4
R7
Unit
R8
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