mcf5274l Freescale Semiconductor, Inc, mcf5274l Datasheet - Page 9

• Manufacturer Part Number: mcf5274l
• Description: Mcf5275 Integrated Microprocessor Family Hardware
• Manufacturer: Freescale Semiconductor, Inc

with support for four 48-bit accumulators. Supported operands include 16- and 32-bit signed and unsigned
integers as well as signed fractional operands as well as a complete set of instructions to process these data
types. The EMAC provides superb support for execution of DSP operations within the context of a single
processor at a minimal hardware cost.
3.3
The ColdFire processor core debug interface is provided to support system debugging in conjunction with
low-cost debug and emulator development tools. Through a standard debug interface, users can access
real-time trace and debug information. This allows the processor and system to be debugged at full speed
without the need for costly in-circuit emulators. The debug interface is a superset of the BDM interface
provided on Motorola’s 683xx family of parts.
The on-chip breakpoint resources include a total of 6 programmable registers—a set of address registers
(with two 32-bit registers), a set of data registers (with a 32-bit data register plus a 32-bit data mask
register), and one 32-bit PC register plus a 32-bit PC mask register. These registers can be accessed through
the dedicated debug serial communication channel or from the processor’s supervisor mode programming
model. The breakpoint registers can be configured to generate triggers by combining the address, data, and
PC conditions in a variety of single or dual-level definitions. The trigger event can be programmed to
generate a processor halt or initiate a debug interrupt exception.
To support program trace, the Version 2 debug module provides processor status (PST[3:0]) and debug
data (DDATA[3:0]) ports. These buses and the PSTCLK output provide execution status, captured operand
data, and branch target addresses defining processor activity at the CPU’s clock rate.
3.4
The MCF5275 microprocessors support circuit board test strategies based on the Test Technology
Committee of IEEE and the Joint Test Action Group (JTAG). The test logic includes a test access port
(TAP) consisting of a 16-state controller, an instruction register, and three test registers (a 1-bit bypass
register, a 326-bit boundary-scan register, and a 32-bit ID register). The boundary scan register links the
device’s pins into one shift register. Test logic, implemented using static logic design, is independent of
the device system logic.
The MCF5275 implementation can do the following:
Freescale Semiconductor
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Perform boundary-scan operations to test circuit board electrical continuity
Sample MCF5275 system pins during operation and transparently shift out the result in the
boundary scan register
Bypass the MCF5275 for a given circuit board test by effectively reducing the boundary-scan
register to a single bit
Disable the output drive to pins during circuit-board testing
Drive output pins to stable levels
Debug Module
JTAG
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 1.1
Preliminary
Features
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