mcf5274l Freescale Semiconductor, Inc, mcf5274l Datasheet - Page 29

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mcf5274l

Manufacturer Part Number
mcf5274l
Description
Mcf5275 Integrated Microprocessor Family Hardware
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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4.12 DMA Timer Signals
Table 14
4.13 Pulse Width Modulator Signals
Table 15
(DTnOUT).
Freescale Semiconductor
DMA Timer 0 Input
DMA Timer 0 Output
DMA Timer 1 Input
DMA Timer 1 Output
DMA Timer 2 Input
DMA Timer 2 Output
DMA Timer 3 Input
DMA Timer 3 Output
USB Transmitted D+
USB Transmit Enable
Signal Name
Signal Name
describes the PWM signals. Note that the primary functions of these pins are DMA Timer outputs
describes the signals of the four DMA timer modules.
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 1.1
DT0IN
DT0OUT
DT1IN
DT1OUT
DT2IN
DT2OUT
DT3IN
DT3OUT
USB_TP
USB_TXEN
Abbreviation
Abbreviation
Table 13. USB Module Signals (continued)
This signal is one half of the differential NRZI formatted output from
the module. It is fed to the transmitted D+ input of the analog front
end.
This signal is an active low output enable for the differential drivers on
the analog front end. When this signal is active, the differential drivers
will drive the USB. When this signal is inactive, the differential drivers
will tristate their outputs.
Can be programmed to cause events to occur in first platform timer. It
can either clock the event counter or provide a trigger to the timer
value capture logic.
The output from first platform timer.
Can be programmed to cause events to occur in the second platform
timer. This can either clock the event counter or provide a trigger to the
timer value capture logic.
The output from the second platform timer.
Can be programmed to cause events to occur in the third platform
timer. It can either clock the event counter or provide a trigger to the
timer value capture logic.
The output from the third platform timer.
Can be programmed as an input that causes events to occur in the
fourth platform timer. This can either clock the event counter or
provide a trigger to the timer value capture logic.
The output from the fourth platform timer.
Table 14. DMA Timer Signals
Preliminary
Function
Function
Signal Descriptions
I/O
I/O
O
O
O
O
O
I
I
I
I
I
29

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