z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 154
z16f2811
Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z16F2811.pdf
(383 pages)
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PS022006-0207
DE
1
0
1
0
Idle State
of Line
Figure 26. LIN-UART Driver Enable Signal Timing (shown with 1 Stop Bit and Parity)
LIN-UART Special Modes
MULTIPROCESSOR (9-bit) Mode
⎛
⎝
The DE to Start bit setup time is calculated as follows:
The special modes of the LIN-UART:
•
•
The LIN-UART has a common control register (Control 0), which has a unique register
address and several mode specific control registers (multiprocessor control, noise filter
control, and LIN control) which share a common register address (Control 1). When the
Control 1 address is read or written, the mode select (
and status register determines which physical register is accessed. Similarly, there are mode
specific status registers, one of which is returned when the Status 0 register is read,
depending on the MSEL field.
The LIN-UART features a MULTIPROCESSOR (9-bit) mode which uses an extra (9
for selective communication when a number of processors share a common UART bus. In
MULTIPROCESSOR mode (also referred to as 9-Bit mode), the multiprocessor bit (
transmitted immediately following the 8 bits of data and immediately preceding the
bit(s) as illustrated in
Start
------------------------------------ -
Baud Rate (Hz)
MULTIPROCESSOR mode
LIN mode
Bit0
lsb
1
Bit1
⎞
⎠
≤
Figure 27
DE to Start Bit Setup Time (s)
Bit2
P R E L I M I N A R Y
Bit3
Data Field
on page 141.
Bit4
Bit5
Bit6
MSEL[2:0])
≤
⎛
⎝
msb
------------------------------------ -
Baud Rate (Hz)
Bit7
Product Specification
Parity
ZNEO
field of the mode select
2
Stop Bit
™
1
Z16F Series
⎞
⎠
LIN-UART
Stop
MP
th
) bit
) is
140
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