z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 334
z16f2811
Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z16F2811.pdf
(383 pages)
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Table 175. Hardware Breakpoint Register (HWBPn)
PS022006-0207
RESET
RESET
FIELD
ADDR
ADDR
FIELD
R/W
R/W
BIT
BIT
Hardware Breakpoint Registers
R/W R/W R/W R/W
PC
31
15
0
The
PC—Break on Program Counter Match
This bit will enable the hardware breakpoint.
0 = Break on program counter match disabled.
1 = Break on program counter match enabled.
ST—Status
This bit is set when a hardware breakpoint occurs.
0 = No breakpoint occurred since this bit was last written to zero.
1 = Breakpoint has occurred or this bit written to one.
RD—Break on data read
This bit will enable the hardware watchpoint for data reads.
0 = Hardware watchpoint on read disabled.
1 = Hardware Watchpoint on read enabled.
WR—Break on data write
This bit will enable the hardware watchpoint for data writes.
0 = Hardware watchpoint on data write disabled.
1 = Hardware watchpoint on data write enabled.
MASK—Watchpoint address mask
The MASK field specifies the number of bits in ADDR to ignore when comparing against
addresses for read and write watchpoints. The mask is set to ignore 0 to 15 of the lower
address bits. This allows the watchpoint to monitor a memory block up to 32K in size.
ST
30
14
FF_E090-FF_E091,FF_E094-FF_E095,FF_E098-FF_E099,FF_E09C-FF_E09D
FF_E092-FF_E093,FF_E096-FF_E097,FF_E09A-FF_E09B,FF_E09E-FF_E09F
0
Hardware Breakpoint Register (HWBPn)
RD
29
13
0
WR
28
12
0
27
11
26
10
MASK
P R E L I M I N A R Y
0000
R/W
25
9
ADDR[15:0]
24
8
0000H
R/W
23
7
is used to set hardware breakpoints.
22
6
21
5
ADDR[23:16]
20
4
R/W
00H
Product Specification
ZNEO
19
3
On-Chip Debugger
™
18
2
Z16F Series
17
1
16
0
320
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