z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 247

• Manufacturer Part Number: z16f2811
• Description: High Performance Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS022006-0207
DMAIF - DMA interface mode.
0 = Used when software polling or interrupts are used to move data.
1 = Used when the DMA is used to move data. The
register are not affected but the I
The I
transmit DMA request. The assertion of RDRF causes a receive DMA request.
MODE—Selects the I
00 = Master/Slave capable (supports multi-Master arbitration) with 7-bit Slave address
01 = Master/Slave capable (supports multi-Master arbitration) with 10-bit Slave address
10 = Slave Only capable with 7-bit address
11 = Slave Only capable with 10-bit address
IRM—Interactive receive mode
Valid in Slave mode when software needs to interpret each received byte before
acknowledging. This bit is useful for processing the data bytes following a General Call
Address or if software wants to disable hardware address recognition.
0 = Acknowledge occurs automatically and is determined by the value of the
the I2CCTL register.
1 = A receive interrupt is generated for each byte received (address or data). The SCL is
held Low during the acknowledge cycle until software writes to the I2CCTL register. The
value written to the
software to Acknowledge or Not Acknowledge after interpreting the associated address/
data byte.
GCE—General call address enable
Enables reception of messages beginning with the General Call Address or START byte.
0 = Do not accept a message with the General Call Address or START byte.
1 = Do accept a message with the General Call Address or START byte. When an address
match occurs, the GCA and RD bits in the I
address matched the General Call Address/START byte or not. Following the General Call
Address byte, software sets the
byte(s) before acknowledging.
SLA[9:8]— Slave address bits 9 and 8
Initialize with the appropriate Slave address value when using 10-bit Slave addressing.
These bits are ignored when using 7-bit Slave addressing.
DIAG—Diagnostic mode
Selects read back value of the Baud Rate Reload and State registers.
0 = Reading the Baud Rate registers returns the Baud Rate register values. Reading the
State register returns I
1 = Reading the Baud Rate registers returns the current value of the baud rate counter.
Reading the State register returns additional state information.
2
C interrupt reflects only the error conditions. The assertion of
NAK
2
2
C Controller state information
C Controller operational mode
bit of the I2CCTL register is output on SDA. This value allows
P R E L I M I N A R Y
IRM
2
C Interrupt is not asserted when
bit that allows software to examine the following data
2
C Status register indicates whether the
TDRE
and
I2C Master/Slave Controller
RDRF
Product Specification
TDRE
ZNEO
bits in the status
TDRE
or
™
causes a
RDRF
Z16F Series
NAK
are set.
bit of
233