z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 238
z16f2811
Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z16F2811.pdf
(383 pages)
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Table 108. I
Table 109. I
I
PS022006-0207
2
RESET
RESET
FIELD
ADDR
FIELD
ADDR
C Control Register Definitions
BITS
BITS
R/W
R/W
I
I
2
2
C Interrupt Status Register
C Data Register
2
2
TDRE
C Data Register (I2CDATA)
C Interrupt Status Register (I2CISTAT)
R
7
7
1
The following section describes the I
The I
register to transmit onto the I
Shift register after it is received from the I
in the Register File address space, but is used only to buffer incoming and outgoing data.
Writes by software to the I2CDATA register are blocked if a slave write transaction is
underway (I
The Read-only I
current I
one or more of the
bits do not generate an interrupt but rather provide status associated with the
interrupt.
TDRE—Transmit data register empty
When the I
set, the I
2
C Data register (see
2
2
RDRF
C Controller generates an interrupt, except when the I
C interrupt and provides status of the I
2
R
6
6
0
2
C Controller is enabled, this bit is 1 if the I
C Controller in slave mode, data being received).
2
C Interrupt Status register (see
TDRE
SAM
R
5
5
0
,
RDRF
P R E L I M I N A R Y
Table
2
C bus. This register also holds data that is loaded from the
,
SAM
108) holds the data that is to be loaded into the Shift
GCA
R
4
4
0
,
2
FF-E240H
FF-E241H
C Control registers.
ARBLST
DATA
R/W
0
2
C bus. The I
,
RD
R
3
SPRS
3
0
2
Table
C Controller
or
109) indicates the cause of any
2
2
ARBLST
C Data register is empty. When
NCKI
C Shift Register is not accessible
R
2
2
0
.
I2C Master/Slave Controller
bits is set
2
When an interrupt occurs
C Controller is shifting in
Product Specification
ZNEO
SPRS
R
1
1
0
.
The
™
Z16F Series
SAM
GCA
NCKI
bit
and
R
0
0
0
RD
,
224
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