z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 295
z16f2811
Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z16F2811.pdf
(383 pages)
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Table 146. DMA Control Register A (DMAxCTL)
DMA Control Registers
PS022006-0207
RESET
RESET
FIELD
ADDR
FIELD
ADDR
BITS
BITS
R/W
R/W
DMA Control Register
DMAxEN
IEOB
R/W
R/W
15
0
7
0
The following section describes the DMA Control registers.
The DMA Control register enables and control the DMA transfer (see
DMAxEN—DMA X enable. If this bit is written directly then normal mode is executed.
If this bit is read in from a descriptor then linked list mode is executed.
0 = DMA is disabled.
1 = DMA is enabled.
LOOP—LOOP mode
0 = Descriptor is modified when the buffer is closed.
1 = Descriptor is not modified when buffer is closed.
TXSIZE—Transfer size
00 = Byte
01 = Word
10 = Quad
11 = Reserved
LOOP
TXFR
R/W
R/W
14
0
6
0
FFE410H, FFE420H, FFE430H, FFE440H
FFE411H, FFE421H, FFE431H, FFE441H
R/W
EOF
R/W
13
0
5
0
TXSIZE
P R E L I M I N A R Y
HALT
R/W
R/W
12
0
4
0
R/W
R/W
11
0
3
0
DSTCTL
R/W
R/W
10
0
2
0
CMDSTAT
Product Specification
ZNEO
R/W
Table
R/W
9
0
1
0
™
SRCCTL
DMA Controller
Z16F Series
146).
R/W
R/W
8
0
0
0
281
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