z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 214
![no-image](/images/no-image-200.jpg)
z16f2811
Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z16F2811.pdf
(383 pages)
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I
PS022006-0207
2
C Master/Slave Controller
The I
I
signal bidirectional lines. Features of the I
•
•
•
•
•
•
•
•
•
2
C protocol. The I
Baud Rate Generator (BRG) is used as a general purpose timer with interrupt if the I
controller is disabled.
Operates in MASTER/SLAVE or SLAVE ONLY modes.
Supports arbitration in a Multi-Master environment (MASTER/SLAVE mode).
Supports data rates up to 400 kbps.
7-bit or 10-bit Slave address recognition (interrupt only on address match).
Optional general call address recognition.
Optional digital filter on receive SDA and SCL lines.
Optional interactive receive mode allows software interpretation of each received
address and/or data byte before acknowledging.
Unrestricted number of data bytes per transfer.
2
C Master/Slave Controller makes the ZNEO Z16F Series bus compatible with the
2
C bus consists of the serial data signal (SDA) and a serial clock (SCL)
P R E L I M I N A R Y
2
C Controller include:
I2C Master/Slave Controller
Product Specification
ZNEO
™
Z16F Series
2
C
200
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