peb2255 Infineon Technologies Corporation, peb2255 Datasheet - Page 239

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peb2255

Manufacturer Part Number
peb2255
Description
E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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Code Violation Counter (Read)
CV15…0…
Data Sheet
CVCH
CVCL
CV15
CV7
7
7
Code Violations
No function if NRZ code has been enabled.
If the HDB3 or the CMI code is selected, the 16-bit counter is
incremented when violations of the HDB3 code are detected. The
error detection mode is determined by programming the bit
FMR0.EXTD.
If simple AMI coding is enabled (FMR0.RC0/1 = 10) all bipolar
violations are counted. The error counter doesn’t roll over.
During alarm simulation, the counter is incremented every four bits
received up to its saturation.
Clearing and updating the counter is done according to bit
FMR1.ECM.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the error counter bit DEC.DCVC
has to be set. With the rising edge of this bit updating the buffer is
stopped and the error counter is reset. Bit DEC.DCVC is reset
automatically with reading the error counter high byte.
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter is latched and then automatically reset. The latched error
counter state should be read within the next second.
239
FALC-LH V1.3
CV0
CV8
E1 Registers
0
0
PEB 2255
2000-07
(52)
(53)

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