pef20324 Infineon Technologies Corporation, pef20324 Datasheet - Page 24

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pef20324

Manufacturer Part Number
pef20324
Description
Multichannel Network Interface Controller With 128 Channels Extended
Manufacturer
Infineon Technologies Corporation
Datasheet

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Hardware Reference Manual
Table 2-5
Pin No.
146
145
142
57
GNT
RST
Symbol
CLK
INTA
Pin Descriptions by Functional Block: PCI Interface (cont’d)
Type Description
t/s
I
I
O (o/
d)
Grant
This signal is asserted by the arbiter to grant control of
the PCI to the MUNICH128X in response to a bus
request via REQ. After GNT is asserted, the
MUNICH128X will begin a bus transaction only after
the current bus Master has deasserted the FRAME
signal.
GNT is sampled on the rising edge of CLK.
Clock
Provides timing for all PCI transactions. Most PCI
signals are sampled or output relative to the rising
edge of CLK. The maximum CLK frequency is
33 MHz.
Reset
An active RST signal brings all PCI registers,
sequencers and signals into a consistent state. All PCI
output signals are driven to their initial state.
Interrupt Request
When an interrupt status is active and unmasked, the
MUNICH128X activates this open-drain output.
Examples of interrupt sources are transmission/
reception error, completion of transmit or receive
packets etc. The MUNICH128X deactivates INTA
when the global interrupt status register STAT is read.
INTA is activated/deactivated asynchronous to the
CLK.
24
Pin Descriptions
PEB 20324
PEF 20324
04.99

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