pef20324 Infineon Technologies Corporation, pef20324 Datasheet - Page 8
pef20324
Manufacturer Part Number
pef20324
Description
Multichannel Network Interface Controller With 128 Channels Extended
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF20324.pdf
(63 pages)
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Multichannel Network Interface Controller for HDLC +
Extensions
MUNICH128X
Version 2.2
1.1
Four independent 24/32-channel HDLC PCM
Controllers with common PCI interface.
Each of them provides:
• Dedicated 1024 byte Tx Buffer
• Dedicated 1024 byte Rx Buffer
• Dedicated Serial PCM Interface Controller
• Dedicated 64-channel DMA Controller
• Dynamic Programmable Channel Allocation
Type
PEB 20324
PEF 20324
Hardware Reference Manual
– T1 rates: 1.536, 1.544, 3.088, 6.176 Mbit/s
– E1 rates: 2.048, 4.096, 8.192 Mbit/s
– Supports linked-list buffer processing
– 16-DWord Tx DMA FIFO
– 16-DWord Rx DMA FIFO
– 4-DWord burst of Rx descriptors
– 3-DWord burst of Tx descriptors
– n-DWord burst of configuration blocks
– Compatible with T1/DS1 24-channel and CEPT 32-channel PCM byte format
– Concatenation of any, not necessarily consecutive, time slots to superchannels
– Support of H0, H11, H12 ISDN-channels
– Subchanneling on each time slot possible
(n is unlimited according the MUNICH128X, but internal port arbitration may lead to
a lower typical burst size of 4 or 8 DWords)
independently for receive and transmit direction
Features
8
Package
P-MQFP-160-1
P-MQFP-160-1
P-MQFP-160-1
PEB 20324
CMOS
04.99