pef20324 Infineon Technologies Corporation, pef20324 Datasheet - Page 48

• Manufacturer Part Number: pef20324
• Description: Multichannel Network Interface Controller With 128 Channels Extended
• Manufacturer: Infineon Technologies Corporation

Hardware Reference Manual
5.7.1.3
When the MUNICH128X operates as a PCI Master (initiator) and it either reads or writes
a burst – as controlled by the on-chip DMA controller – it does not deactivate IRDY
between consecutive data. In other words, no wait states are inserted by the
MUNICH128X as a transaction initiator. The numbers of wait states, inserted by the
MUNICH128X as initiator are listed in table 5-6.
Table 5-6
Transaction
Memory read burst
Memory write burst
Fast Back-to-back burst;
1st transaction
Fast Back-to-back burst;
2nd and subsequent
transactions
When the MUNICH128X operates as a PCI Slave (target), it inserts wait cycles by
deactivating TRDY. The numbers of wait states, typically inserted by the MUNICH128X
are listed in table 5-6:
Table 5-7
Transaction
Configuration read
Configuration write
Register read
Register write
LBI read
LBI write
The number of wait states inserted by the MUNICH128X as target is not critical because
accesses to the MUNICH128X are usually kept to a minimum in a system.
PCI Timing Characteristics
Number of Wait States Inserted by the MUNICH128X as Initiator
Number of Wait States Inserted by the MUNICH128X as Slave
1st Data Cycle
0
0
0
1
48
Number of Wait States
2
0
3
0
3
0
Number of Wait States
2nd and Subsequent Data Cycles
0
0
0
0
Electrical Characteristics
PEB 20324
PEF 20324
04.99