m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 114

• Manufacturer Part Number: m30833fjgp
• Description: Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
• Manufacturer: Renesas Electronics Corporation.

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10.4 High-Speed Interrupt
10.5 Interrupts and Interrupt Vectors
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Figure 10.2 Interrupt Vector
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10.3.2 Peripheral Function Interrupt
The high-speed interrupt executes an interrupt sequence in five cycles and returns from the interrupt in 3
cycles.
When the FSIT bit in the RLVL register is set to "1" (interrupt priority level 7 available for the high-speed
interrupt), the ILVL2 to ILVL0 bits in the interrupt control registers can be set to "111
high-speed interrupt.
Only one interrupt can be set as the high-speed interrupt. When using the high-speed interrupt, do not set
multiple interrupts to interrupt priority level 7. Set the DMAII bit in the RLVL register to "0" (interrupt priority
level 7 available for interrupts).
Set the starting address of the high-speed interrupt service routine in the VCT register.
When the high-speed interrupt is acknowledged, the FLG register is saved to the SVF register and PC is
saved to the SVP registers. The program is executed from an address indicated by the VCT register.
Execute the FREIT instruction to return from the high-speed interrupt service routine.
The values saved to the SVF and SVP registers are restored to the FLG register and PC by executing the
FREIT instruction.
The high-speed interrupt and the DMA2 and DMA3 use the same register. When using the high-speed
interrupt, neither DMA2 nor DMA3 is available. DMA0 and DMA1 can be used.
There are four bytes in one vector. Set the starting address of interrupt service routine in each vector table.
When an interrupt request is acknowledged, the interrupt service routine is executed from the address set
in the interrupt vectors. Figure 10.2 shows the interrupt vector.
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The peripheral function interrupt occurs when a request from the peripheral functions in the microcom-
puter is acknowledged. The peripheral function interrupts and software interrupt numbers 7 to 54 and
57 for the INT instruction use the same interrupt vector table. The peripheral function interrupt is a
maskable interrupt.
See Table 10.2 about how the peripheral function interrupt occurs. Refer to the descriptions of each
function for details.
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Vector Address + 0
Vector Address + 1
Vector Address + 2
Vector Address + 3
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MSB
Middle-order bits of an address
High-order bits of an address
Low-order bits of an address
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16
LSB
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" (level 7) to use the
10. Interrupts