m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 423

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m30833fjgp

Manufacturer Part Number
m30833fjgp
Description
Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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25.3.5 Software Commands
Read or write commands and data from or to even addresses in the user ROM area, in 16-bit units. When
writing a command code, 8 high-order bits (D
1
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B
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0
1
25.3.5.1 Read Array Command
25.3.5.2 Read Status Register Command
25.3.5.3 Clear Status Register Command
25.3.5.4 Page Program Command
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The read array command reads the flash memory.
Read array mode is entered by writing command code "xxFF
specified address can be read after the next bus cycle.
The microcomputer remains in read array mode until another command is written. Therefore, contents
from multiple addresses can be read consecutively.
The read status register command reads the status register (refer to 25.3.7 Status Register for details).
By writing command code "xx70
bus cycle. Read an even address in the user ROM area.
The clear status register command clears the status register. By writing "xx50
the SR5 to SR3 bits in the status register (see Table 25.4) are set to "0".
The page program command executes programs in 128-word (256-byte) units.
After writing command code "xx41
cycles in 16-bit units. Increment by two, from "00
Auto write, programming and verification of data, is performed when 128 word data has been written.
Do not access the flash memory or execute the next command during auto write operation.
The FMR00 bit in the FMR0 register indicates whether an auto program operation is completed.
After an auto write operation is completed, the Status register indicates whether the auto write opera-
tion is completed as expected or not. (Refer to 25.3.6 Full Status Check.)
Figure 25.6 shows a flow chart of the page program command programming. When programming a
space which is already programmed, execute erase (block erase) before programming. If the page
program command is executed to a space already programmed, no program error occurs but the page
is indeterminate.
The lock bit can protect blocks from being programmed. (Refer to 25.3.3 Data Protect Function.)
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16
" in the first bus cycle, the status register can be read in the second
16
" in the first bus cycle, write data to the 2nd through 129th bus
15
to D
8
16
) are ignored.
" to "FE
16
", the 8 low-order bits of the write address.
16
" in the first bus cycle. Content of a
25. Flash Memory Version
16
" in the first bus cycle,

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