m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 390

• Manufacturer Part Number: m30833fjgp
• Description: Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
• Manufacturer: Renesas Electronics Corporation.

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R
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24.5 Function Select Register C (PSC Register)
24.6 Pull-up Control Register 0 to 4 (PUR0 to PUR4 Registers)
24.7 Port Control Register (PCR Register)
24.8 Input Function Select Register (IPS Register)
24.9 Analog Input and Other Peripheral Function Input
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Figure 24.14 show the PSC register.
When multiple peripheral function outputs are assigned to a pin, the PSC register select which peripheral
function output is used.
Refer to 24.9 Analog Input and Other Peripheral Function Input for the PSC_7 bit in the PSC register.
Figures 24.15 to 24.16 show the PUR0 to PUR4 registers.
The PUR0 to PUR4 registers select whether the ports, divided into groups of four ports, are pulled up or not.
Ports with bits in the PUR0 to PUR4 registers set to "1" (pull-up) and the direction registers set to "0" (input
mode) are pulled up.
Set bits in the PUR0 and PUR1 registers which control P0 to P5, running as bus, to "0" (no pull-up) in
memory expansion and microprocessor mode. P0, P1, P4
input ports in memory expansion mode and microprocessor mode.
Figure 24.17 shows the PCR register.
The PCR register selects either CMOS output or N-channel open drain output as the P1 output format. If
the PCR0 bits is set to "1" (N-channel open drain output), N-channel open drain output is selected because
the P-channel in the CMOS port is turned off. This is, however, not a perfect open drain. Therefore, the
absolute maximum rating of the input voltage is from -0.3V to Vcc + 0.3V.
If P1 is used as the data bus in memory expansion and microprocessor mode, set the PCR0 bit to "0"
(CMOS output). If P1 is used as a port in memory expansion and microprocessor mode, the PCR0 bit
determines the output format.
Figure 24.18 shows the IPS registers.
The IPS0 to IPS1 and IPS3 bits in the IPS register and the IPSA_0 and IPSA_3 bits in the IPSA register
select which pin is assigned the intelligent I/O or CAN input functions.
Refer to 24.9 Analog Input and Other Peripheral Function Input for the IPS2 bit.
The PSL3_3 to PSL3_6 bits in the PSL3 register, the PSC_7 bit in the PSC register and the IPS2 bit in the
IPS register each separate analog I/O ports from other peripheral functions. Setting the corresponding bit to
"1" (analog I/O) to use the analog I/O port (DA0, DA1, ANEX0, ANEX1, AN
prevents an intermediate potential from being impressed to other peripheral functions. The impressed inter-
mediate potential may cause increase in power consumption.
Set the corresponding bit to "0" (except analog I/O) when analog I/O is not used. All peripheral function
inputs except the analog I/O port are available when the corresponding bit is set to "0". These inputs are
indeterminate when the bit is set to "1". When the PSC_7 bit is set to "1", key input interrupt request remains
unchanged regardless of KI
1
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Page 367
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_____
3
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0
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8
3
pin input level change.
0
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3
can be pulled up when they are used as
4
to AN
24. Programmable I/O Port
7
or AN15
0
to AN15
7
)