r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 1120

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 25 Electrical Characteristics
Rev. 2.00 Dec. 09, 2005 Page 1096 of 1152
REJ09B0191-0200
(Bank Active Mode: ACT + WRITE Commands, WTRCD = 0 Cycle, TRWL = 0 Cycle)
Figure 25.32 Synchronous DRAM Burst Write Bus Cycle (Four Write Cycles)
A12/A11
D31 to D0
A25 to A0
Notes: 1. An address pin to be connected to pin A10 of SDRAM.
DACKn
TENDn*
RASU/L
CASU/L
RD/WR
DQMxx
CKIO
CKE
CSn
BS
*
2. The waveform for DACKn and TENDn is when active low is specified.
1
2
t
t
t
DQMD1
t
t
RWD1
CSD1
t
AD1
AD1
DACD
t
RASD1
Tr
address
Row
t
RWD1
t
t
t
t
RASD1
WDD2
t
CASD1
AD1
t
AD1
BSD
Tc1
(High)
t
t
WDH2
AD1
address
Tc2
Column
WRIT command
t
AD1
Tc3
t
WDD2
t
AD1
Tc4
t
t
DQMD1
t
t
t
CASD1
BSD
WDH2
t
t
RWD1
t
AD1
AD1
CSD1
t
DACD

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