r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 69

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

2.3.3
The instruction formats and the meaning of source and destination operands are described below.
The meaning of the operand depends on the instruction code. The symbols used are as follows:
• xxxx: Instruction code
• mmmm: Source register
• nnnn: Destination register
• iiii: Immediate data
• dddd: Displacement
Table 2.9
Instruction Formats
0 format
15
n format
15
xxxx
xxxx
nnnn
xxxx
Instruction Format
Instruction Formats
xxxx xxxx
xxxx
xxxx
0
0
Source
Operand
—
—
Control register or
system register
R0 (Register direct) nnnn: Register
Control register or
system register
mmmm: Register
direct
R15 (Register
indirect with post-
increment)
R0 (Register direct) nnnn: (Register
Destination
Operand
—
nnnn: Register
direct
nnnn: Register
direct
direct
nnnn: Register
indirect with pre-
decrement
R15 (Register
indirect with pre-
decrement)
nnnn: Register
direct
indirect with post-
increment)
Rev. 2.00 Dec. 09, 2005 Page 45 of 1152
Example
NOP
MOVT
STS
DIVU
STC.L SR,@-Rn
MOVMU.L
MOVMU.L
MOV.L R0,@Rn+
REJ09B0191-0200
Section 2 CPU
Rn
MACH,Rn
R0,Rn
Rm,@-R15
@R15+,Rn