r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 629
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r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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10.7
10.7.1
MTU2 operation can be disabled or enabled using the standby control register. The initial setting
is for MTU2 operation to be halted. Register access is enabled by clearing module standby mode.
For details, refer to section 22, Power-Down Modes.
10.7.2
The input clock pulse width must be at least 1.5 states in the case of single-edge detection, and at
least 2.5 states in the case of both-edge detection. The MTU2 will not operate properly at narrower
pulse widths.
In phase counting mode, the phase difference and overlap between the two input clocks must be at
least 1.5 states, and the pulse width must be at least 2.5 states. Figure 10.118 shows the input clock
conditions in phase counting mode.
Figure 10.118 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
TCLKA
(TCLKC)
TCLKB
(TCLKD)
Notes: Phase difference and overlap
Usage Notes
Module Standby Mode Setting
Input Clock Restrictions
Pulse width
Overlap
Pulse width
Phase
differ-
ence
Overlap
: 1.5 states or more
: 2.5 states or more
Phase
differ-
ence
Pulse width
Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Pulse width
Rev. 2.00 Dec. 09, 2005 Page 605 of 1152
Pulse width
REJ09B0191-0200
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