r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 285

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r5s72060w200fpv

Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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0
8.4.7
RTCOR is an 8-bit register. When RTCOR matches RTCNT, the CMF bit in RTCSR is set to 1
and RTCNT is cleared to 0.
When the RFSH bit in SDCR is 1, a memory refresh request is issued by this matching signal.
This request is maintained until the refresh operation is performed. If the request is not processed
when the next matching occurs, the previous request is ignored.
The REFOUT signal can be asserted when a refresh request is generated while the bus is released.
For details, see the description of Relationship between Refresh Requests and Bus Cycles in
section 8.5.6, SDRAM Interface, Relationship between Refresh Requests and Bus Cycles, and
section 8.5.13, Bus Arbitration.
When the CMIE bit in RTCSR is set to 1, an interrupt request is issued by this matching signal.
The request continues to be output until the CMF bit in RTCSR is cleared. Clearing the CMF bit
only affects the interrupt request and does not clear the refresh request. Therefore, a combination
of refresh request and interval timer interrupt can be specified so that the number of refresh
requests are counted by using timer interrupts while refresh is performed periodically.
When RTCOR is written, the upper 16 bits of the write data must be H'A55A to cancel write
protection. This register is initialized to H'00000000 by a power-on reset and retains the value by a
manual reset and in software standby mode.
Initial value:
Initial value:
Bit
31 to 8
7 to 0
R/W:
R/W:
Bit:
Bit:
Refresh Time Constant Register (RTCOR)
Bit Name
31
15
R
R
0
0
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
All 0
All 0
28
12
R
R
0
0
-
-
27
11
R
R
0
0
R/W Description
R
R/W 8-Bit Counter
-
-
26
10
R
R
0
0
-
-
Reserved
These bits are always read as 0.
25
R
R
0
9
0
-
-
24
R
R
0
8
0
-
-
R/W
23
R
0
7
0
-
Rev. 2.00 Dec. 09, 2005 Page 261 of 1152
R/W
22
R
0
6
0
-
Section 8 Bus State Controller (BSC)
R/W
21
R
0
5
0
-
R/W
20
R
0
4
0
-
R/W
19
R
0
3
0
-
REJ09B0191-0200
R/W
18
R
0
2
0
-
R/W
17
R
0
0
1
-
R/W
16
R
0
0
0
-

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