r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 59

• Manufacturer Part Number: r5s72060w200fpv
• Description: 32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
• Manufacturer: Renesas Electronics Corporation.

Section 2 CPU
2.2.3
Immediate Data Format
Byte (8-bit) immediate data is located in an instruction code. Immediate data accessed by the
MOV, ADD, and CMP/EQ instructions is sign-extended and handled in registers as longword
data. Immediate data accessed by the TST, AND, OR, and XOR instructions is zero-extended and
handled as longword data. Consequently, AND instructions with immediate data always clear the
upper 24 bits of the destination register.
20-bit immediate data is located in the code of a MOVI20 or MOVI20S 32-bit transfer instruction.
The MOVI20 instruction stores immediate data in the destination register in sign-extended form.
The MOVI20S instruction shifts immediate data by eight bits in the upper direction, and stores it
in the destination register in sign-extended form.
Word or longword immediate data is not located in the instruction code, but rather is stored in a
memory table. The memory table is accessed by an immediate data transfer instruction (MOV)
using the PC relative addressing mode with displacement.
See examples given in section 2.3.1, RISC-Type Instruction Set, Immediate Data.
Rev. 2.00 Dec. 09, 2005 Page 35 of 1152
REJ09B0191-0200