w925e625 ETC-unknow, w925e625 Datasheet - Page 14

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w925e625

Manufacturer Part Number
w925e625
Description
8-bit Cid Microcontroller
Manufacturer
ETC-unknow
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
w925e625FG
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
DPL1:
DATA POINTER HIGH1
DPH1:
DATA POINTER SELECT
DPS.0:
DPS.1-7:These bits are reserved, but will read 0.
POWER CONTROL
IDLT:
GF1-0:
PD:
IDL:
This is the low byte of the new additional 16-bit data pointer. That has been added to the
W925E/C625. The user can switch between DPL, DPH and DPL1, DPH1 simply by setting
register DPS.0 = 1. The instructions that use DPTR will now access DPL1 and DPH1 in
place of DPL and DPH. If they are not required, they can be used as conventional register
locations by the user.
This is the high byte of the new additional 16-bit data pointer. That has been added to the
W925E/C625. The user can switch between DPL, DPH and DPL1, DPH1 simply by setting
register DPS = 1. The instructions that use DPTR will now access DPL1 and DPH1 in place
of DPL and DPH. If they are not required, they can be used as conventional register
locations by the user.
This bit is used to select either the DPL,DPH pair or the DPL1,DPH1 pair as the active Data
Pointer. When set to 1, DPL1,DPH1 will be selected, otherwise DPL,DPH will be selected.
This bit controls the idle mode type. In idle mode when idle mode is released by any
interrupt, if IDLT=1 it will not jump to the corresponding interrupt; if IDLT=0 it will jump to the
corresponding interrupt.
These two bits are general-purpose user flags.
Setting this bit causes the W925E/C625 to go into the POWER DOWN mode. In this mode,
all the clocks are stopped and program execution is frozen. Power down mode can be
released by INT0~INT3 and ring detection of CID interrupt.
Setting this bit causes the W925E/C625 to go into the IDLE mode. The type of idle mode is
selected by IDLT. In this mode the clocks to the CPU are stopped, so program execution is
frozen. However, the clock path to the timers blocks and interrupt blocks is not stopped, and
these blocks continue operating.
Mnemonic: DPH1
Mnemonic: DPS
Mnemonic: PCON
Bit:
Bit:
Bit:
DPH1.7 DPH1.6 DPH1.5 DPH1.4 DPH1.3 DPH1.2 DPH1.1 DPH1.0
7
7
7
-
-
6
6
6
-
-
- 14 -
5
5
5
-
-
IDLT
4
4
4
-
GF1
3
3
3
-
Address: 85h
Address: 86h
Address: 87h
(initial=00H)
(initial=00H)
GF0
2
2
2
-
W925E/C625
(initial=00H)
PD
1
1
1
-
DPS.0
IDL
0
0
0

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