w925e625 ETC-unknow, w925e625 Datasheet - Page 33

• Manufacturer Part Number: w925e625
• Description: 8-bit Cid Microcontroller
• Manufacturer: ETC-unknow

6.4
The W925E/C625 executes all the instructions of the standard 8032 family. However, timing of these
instructions is different. In the W925E/C625, each machine cycle consists of 4 clock periods, while in
the standard 8032 it consists of 12 clock periods. Also, in the W925E/C625 there is only one fetch per
machine cycle i.e. 4 clocks per fetch, while in the standard 8032 there can be two fetches per machine
cycle, which works out to 6 clocks per fetch.
A “X” indicates that the modification is as per the result of instruction.
A “-“ indicates that the flag is not effected by the instruction.
INSTRUCTION CARRY OVERFLOW
INC,DEC
INSTRUCTION
RRC A
RLC A
ADDC
SUBB
ADD A, #data
ADD A, direct
DA A
ADD A, @R0
ADD A, @R1
ADD
MUL
ADDC A, R0
ADDC A, R1
ADDC A, R2
ADDC A, R3
DIV
ADD A, R0
ADD A, R1
ADD A, R2
ADD A, R3
ADD A, R4
ADD A, R5
ADD A, R6
ADD A, R7
Instruction
NOP
X
X
X
X
X
X
0
0
-
OP-CODE
HEX
2A
2B
2C
2D
2E
3A
3B
00
28
29
2F
26
27
25
24
38
39
Table 2 Instructions that affect Flag settings
Table 3 Instruction Timing for W925E/C625
X
X
X
X
X
-
BYTES
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
AUXILIARY
CARRY
MACHINE
CYCLES
X
X
X
-
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
- 33 -
INSTRUCTION CARRY OVERFLOW
MOV C, bit
ORL C, bit
ORL C, bit
ANL C, bit
ANL C, bit
SETB C
CLR C
CPL C
CJNE A, direct, rel
CJNE
ANL direct, #data
INSTRUCTION
ANL A, #data
ANL A, direct
ANL direct, A
ANL A, @R0
ANL A, @R1
ANL C, /bit
ANL A, R0
ANL A, R1
ANL A, R2
ANL A, R3
ANL A, R4
ANL A, R5
ANL A, R6
ANL A, R7
ANL C, bit
Publication Release Date: July 4, 2005
X
X
X
X
X
X
X
1
0
OP-CODE
HEX
5A
5B
5C
5D
5E
B0
B5
58
59
5F
56
57
55
54
52
53
82
W925E/C625
BYTES
1
1
1
1
1
1
1
1
1
1
2
2
2
3
2
2
3
AUXILIARY
Revision A10
CARRY
MACHINE
CYCLES
1
1
1
2
2
3
2
1
1
1
1
1
1
1
2
2
4