w925e625 ETC-unknow, w925e625 Datasheet - Page 30

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w925e625

Manufacturer Part Number
w925e625
Description
8-bit Cid Microcontroller
Manufacturer
ETC-unknow
Datasheet

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w925e625FG
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WATCHDOG CONTROL
POR: Power-on reset flag. Hardware will set this flag when system is powered on and this flag is
WFS: Watchdog Timer Frequency Select. Set to select F
WDIF: Watchdog Timer Interrupt flag. This bit is set whenever the time-out occurs in the watchdog
WTRF: Watchdog Timer Reset Flag. Hardware will set this bit when the watchdog timer causes a
EWT: Enable Watchdog timer Reset. Setting this bit will enable the Watchdog timer Reset function.
RWT: Reset Watchdog Timer. This bit helps in putting the watchdog timer into a known state. It also
Note: The WDCON SFR is set to a 0x000xx0b on an external reset. WTRF is set to a 1 on a Watchdog timer reset, but to a 0
on power on/down resets. WTRF is not altered by an external reset. POR is set to 1 by a power-on reset. EWT is set to 0 on a
Power-on reset and unaffected by other resets.
ACCUMULATOR
ACC.7-0: The ACC register.
EXTENDED INTERRUPT ENABLE
EIE.7-6:Reserved bits.
EWDI: Enable Watchdog timer interrupt.
ECOMP: Enable comparator interrupt.
EDIV: Enable Divider interrupt.
ECID: Enable CID interrupt.
cleared only by software.
WDT clock input.
helps in resetting the watchdog timer before a time-out occurs. Failing to set the EWT before
time-out will cause an interrupt, if EWDI (EIE.5) is set, and 512 clocks after that a watchdog
timer reset will be generated if EWT is set. This bit is self-clearing by hardware.
timer. If the Watchdog interrupt is enabled (EIE.5), then an interrupt will occur (if the global
interrupt enable is set and other interrupt requirements are met). Software or any reset can
clear this bit.
reset. Software can read it but must clear it manually. A power-fail reset will also clear the bit.
This bit helps software in determining the cause of a reset. If EWT = 0, the watchdog timer
will have no effect on this bit.
Mnemonic: WDCON
Mnemonic: ACC
Mnemonic: EIE
Bit:
Bit:
Bit:
ACC.7
7
-
7
7
-
ACC.6
POR
6
6
6
-
ACC.5
EWDI
- 30 -
5
5
5
-
ECOMP
ACC.4
WFS
S
4
4
4
as WDT clock input. Clear to select F
ACC.3
WDIF
EDIV
3
3
3
Address: D8h
Address: E0h
(initial: note)
(initial=00H)
(initial=00H)
Address: E8h
WTRF
ACC.2
ECID
2
2
2
W925E/C625
ACC.1
EWT
EX3
1
1
1
ACC.0
RWT
EX2
OSC
0
0
0
as

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