w925e625 ETC-unknow, w925e625 Datasheet - Page 29

• Manufacturer Part Number: w925e625
• Description: 8-bit Cid Microcontroller
• Manufacturer: ETC-unknow

FSK TRANSMIT DATA BUFFER
FSKTB.0: Only This bit will be latched and send out as FSK signal
DIVIDER CONTROL
DIVA: Divider available control bit. This bit is set or cleared by software to enable/disable divider.
PROGRAM STATUS WORD
CY:
AC:
F0:
RS.1-0: Register bank select bits:
OV:
F1:
P:
RS1
DIVA=1 to enable the divider. DIVA=0 to disable the divider. DIVA is reset after reset.
Overflow flag. Set when a carry was generated from the seventh bit but not from the 8
result of the previous operation, or vice-versa.
User Flag 1. General purpose flag that can be set or cleared by the user by software.
Parity flag. Set/cleared by hardware to indicate odd/even number of 1’s in the accumulator.
0
0
1
1
Carry flag. Set for an arithmetic operation, which results in a carry being generated from the
ALU. It is also used as the accumulator for the bit operations.
Auxiliary carry. Set when the previous operation resulted in a carry from the high order nibble.
User flag 0. General purpose flag that can be set or cleared by the user.
Mnemonic: PSW
Mnemonic: FSKTB
Mnemonic: DIVC
Bit:
Bit:
Bit:
RS0
0
1
0
1
FSKTB.7 FSKTB.6 FSKTB.5 FSKTB.4 FSKTB.3 FSKTB.2 FSKTB.1 FSKTB.0
CY
7
7
7
-
AC
6
6
6
-
REGISTER BANK
F0
5
5
5
-
- 29 -
0
1
2
3
RS1
4
4
4
-
RS0
Publication Release Date: July 4, 2005
3
3
3
-
Address: C7h
Address: C8h
Address: D0h
(initial=01H)
(initial=00H)
OV
2
2
2
-
W925E/C625
(initial=00H)
ADDRESS
00-07h
08-0Fh
10-17h
18-1Fh
F1
1
1
1
-
Revision A10
th
DIVA
bit as a
P
0
0
0