w925e625 ETC-unknow, w925e625 Datasheet - Page 45

• Manufacturer Part Number: w925e625
• Description: 8-bit Cid Microcontroller
• Manufacturer: ETC-unknow

RWT: WDCON.0 – Reset Watchdog Timer. This bit is used to clear the Watchdog timer and to
CLOCK CONTROL
WD1,WD0:
The default Watchdog time-out is 2
6.9
The P4.0 and P4.1 can be used as a 8-bit serial input/output port1. P4.0 is the serial port 1 clock I/O
pin and P4.1 is the serial port 1 data I/O pin. The serial port 1 is controlled by SCON1 register which is
described as below.
SF1: Serial port 1 interrupt flag. When 8-bits data is transited completely, SF1 is set by hardware.
REN1: Set REN1 from 0 to 1 to start the serial port1 to receive 8-bit serial data.
SFQ:
SEDG:
CLKIO:
SIO:
Any instruction causes a write to SBUF1 will start the transmission of serial port 1. As the REN1 is
from 0 to 1, the serial port 1 begins to receive a byte into SBUF1 in the frequency of the serial clock.
REN1 could be cleared by software after receive function begins. The LSB is transmitted/ received
first. The I/O mode of serial clock pin is controlled by CLKIO. User has to take care the initial state of
the serial port pins.
Serial Port 1
SF1 is cleared when serial interrupt1 routine is executed or cleared by software.
restart it. This bit is self-clearing, so after the software writes 1 to it the hardware will
automatically clear it. If the Watchdog timer reset is enabled, then the RWT has to be set by
the user within 512 clocks of the time-out. If this is not done then a Watchdog timer reset will
occur.
SFQ= 0 Serial clock output frequency is equal to f
SFQ= 1 Serial clock output frequency is equal to f
SEDG= 0 Serial data latched at falling edge of clock, SCLK=Low initially.
SEDG= 1 Serial data latched at rising edge of clock, SCLK=High initially.
CLKIO= 0 P4.0(SCLK) work as output mode
CLKIO= 1 P4.0(SCLK) work as input mode
SIO= 0 P4.0 & P4.1 work as normal I/O pin
SIO= 1 P4.0 & P4.1 work as Serial port1 function
CKCON.7, CKCON.6 – Watchdog Timer Mode select bits. These two bits select the
time-out interval for the watchdog timer. The reset time is longer 512 clocks time than
the interrupt time-out value.
12
clocks, which is the shortest time-out period.
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Publication Release Date: July 4, 2005
W925E/C625
Revision A10