w925e625 ETC-unknow, w925e625 Datasheet - Page 50

• Manufacturer Part Number: w925e625
• Description: 8-bit Cid Microcontroller
• Manufacturer: ETC-unknow

P1: I/O mode is controlled by P1IO. Pull high is controlled by P1H. P1.0~P1.3 work as INT2,
P2: I/O mode is controlled by P2IO. Pull high is controlled by P2H.
P3: I/O mode is controlled by P3IO. Pull high is controlled by P3H.
P4: I/O mode is controlled by P4IO. Pull high is controlled by P4H.
6.14 Divider
A built-in 13/14-bit binary up-counter designed to generate periodic interrupt. The clock source is from
sub-oscillator. When the frequency of sub-crystal is 32768Hz, it provides the divider interrupt in the
period of 0.25/0.5 second. Bit DIVS controls the degree of divider. When DIVA is high to enable the
divided counter, when DIVA is low to reset divider and stop counting. As the divider overflows, the
divider interrupt flag DIVF is set. DIVF is clear by software or serving divider interrupt routine.
Special function of P4 is described below.
P1.4~P1.7 work as INT3. Falling edge on P1 pins to produce INT2 and INT3 flag. P1 is
configured as INT2/INT3 by P1EF register.
P3.5
P3.4
P3.3
P3.2
P4.4
P4.2
P4.1
P4.0
T1
T0
Vpos
Vneg
SDATA
SCLK
INT1
INT0
Fs
(DIVC.0)
DIVA
Timer/counter 1 external count input
Timer/counter 0 external count input
External interrupt 1
External interrupt 0
Positive input of the comparator
Negative input of the comparator
Serial port output
Serial port input
1
Figure 6-13 13/14-bit Divider
13 14
Clear by software
Executing DIV Int
- 50 -
overflow
(CKCON1.1)
DIVS
D
ck
CR
Q
(EXIF.3)
DIVF
W925E/C625