cx28500 Mindspeed Technologies, cx28500 Datasheet - Page 127

• Manufacturer Part Number: cx28500
• Description: Cx28500 Multichannel Synchronous Communications Controller
• Manufacturer: Mindspeed Technologies

employed to provide ample data storage while the Host processes each message in the table of messages. For
low-speed channels, fewer and smaller buffers can be employed, because the Host may be able to process each
message faster, and the need to store messages is lessened.
Multiple smaller data buffers can store one large message. In utilizing multiple buffers, the importance of keeping
the sequence of data buffers in order is obvious.
CX28500's operation allows for the following:
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•
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A message descriptor is intentionally designed to be usable by both the transmit and receive functions in CX28500.
In providing this symmetry, a mechanism known as self-servicing buffers is available. This mechanism allows the
reuse of a single descriptor for both the transmit and receive portions of a channel, and is designed for diagnostics
and loop-back capabilities. For details, see Self-Servicing Buffers.
There are up to 4096 entries in Transmit or Receive Message Descriptor Table (TMDT and RMDT) each of 2
dwords. Each entry in this table contains either a Buffer Descriptor (BD) which is written by the Host or a Buffer
Status Descriptor (BSD) which is written by CX28500. The BD and BSD represent one dword from the content of
TMDT or RMDT; the other dword contains the address of the data buffer (see
Table 6-39.
CX28500 checks certain data from a message descriptor before processing the associated data buffer. When a
data buffer is completely processed (either transmitted or received), CX28500 overwrites the buffer descriptor field
(the first dword in a message descriptor) with a buffer status descriptor, if this is allowed for the related channel. For
details see
Register.
The buffer status descriptor specifies the number of bytes transferred, an End Of Message indicator, and a buffer
ONR-bit indicator that assigns control of associated buffers back to the Host.
The ONR-bit mechanism transfers control of a data buffer between CX28500 and the Host. The message
descriptor can be assigned before an associated data buffer is allocated in memory. In this case, CX28500 is
instructed to poll the contents of the buffer descriptor until the Host grants ownership of a data buffer to CX28500.
After CX28500 processes the data buffer, it grants the ownership back to the Host.
If the ONR-bit indicates that CX28500 does not own the next buffer and if NP = 1 (polling is not enabled) and in
mid-message, then this is an error condition. CX28500 generates ONR interrupt and all the DMA handling is
28500-DSH-002-C
Byte Offset
Multiple message descriptor tables
Multiple and variable size buffers within a message descriptor table
Multiple buffers storing a single message
Sequencing of individual data buffers for a multi-buffer message
Total
00h
04h
Table 6-25, RDMA Channel Configuration Register
Transmit or Receive Message Descriptor Table (TMDT) or (RMDT) Content
Data Pointer
Buffer Descriptor (Host Writes) Buffer Status Descriptor (CX28500 Writes)
NOTE:
When operating in ECC mode, if configured to write Buffer Status Descriptor, CX28500
writes both the status descriptor and its attached data buffer pointer. This is necessary in
order to perform a 64-bit write transaction. The pointer value is the same value that was
read by CX28500.
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Field Name
and
®
Table 6-33, TDMA Channel Configuration
Table
6-39).
Memory Organization
dwords
1
1
2
Bytes
4
4
8
112