EP1C4 ALTERA [Altera Corporation], EP1C4 Datasheet - Page 33

• Manufacturer Part Number: EP1C4
• Description: Cyclone FPGA Family Data Sheet
• Manufacturer: ALTERA [Altera Corporation]

Figure 2–19. Input/Output Clock Mode in Simple Dual-Port Mode
Notes to
(1)
(2)
Altera Corporation
January 2007
wraddress[ ]
address[ ]
byteena[ ]
outclken
outclock
inclken
inclock
All registers shown except the rden register have asynchronous clear ports.
Violating the setup or hold time on the address registers could corrupt the memory contents. This applies to both
read and write operations.
data[ ]
wren
rden
Figure
6 LAB Row
Clocks
6
2–19:
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
Q
Q
Q
Q
Q
Q
Generator
Pulse
Write
Data In
Read Address
Byte Enable
Write Address
Read Enable
Write Enable
Memory Block
Notes
Data Out
1,024 ´ 4
2,048 ´ 2
4,096 ´ 1
256 ´ 16
512 ´ 8
(1),
(2)
D
ENA
Q
Embedded Memory
Preliminary
To MultiTrack
Interconnect
2–27