EP1C4 ALTERA [Altera Corporation], EP1C4 Datasheet - Page 95
EP1C4
Manufacturer Part Number
EP1C4
Description
Cyclone FPGA Family Data Sheet
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.EP1C4.pdf
(104 pages)
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Altera Corporation
January 2007
1.5-V LVTTL
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
LVDS
LVCMOS
3.3-V LVTTL
2.5-V LVTTL
1.8-V LVTTL
1.5-V LVTTL
3.3-V PCI
Table 4–44. Cyclone I/O Standard Output Delay Adders for Slow Slew Rate on Column Pins (Part 2 of 2)
Table 4–45. Cyclone I/O Standard Output Delay Adders for Slow Slew Rate on Row Pins (Part 1 of 2)
I/O Standard
I/O Standard
4 mA
8 mA
2 mA
4 mA
8 mA
12 mA
8 mA
12 mA
16 mA
24 mA
8 mA
12 mA
16 mA
8 mA
12 mA
4 mA
8 mA
2 mA
4 mA
2 mA
2 mA
2 mA
-6 Speed Grade
Min
-6 Speed Grade
Min
6,789
5,109
4,793
1,390
1,965
1,692
1,800
1,311
1,831
1,484
1,012
2,747
1,757
1,763
1,623
5,506
4,220
4,008
6,789
5,109
4,793
Max
Max
989
802
945
807
973
838
923
-7 Speed Grade
Min
-7 Speed Grade
Min
7,807
5,875
5,511
1,598
1,137
2,259
1,945
2,070
1,507
1,086
2,105
1,705
1,118
1,163
3,158
2,019
2,026
1,865
6,331
4,852
4,608
7,807
5,875
5,511
1,061
Max
Max
922
928
963
-8 Speed Grade
Min
-8 Speed Grade
Min
8,825
6,641
6,230
1,807
1,285
2,554
2,199
1,042
2,340
1,704
1,228
1,049
2,380
1,928
1,264
1,315
1,089
3,570
2,283
2,291
2,109
7,157
5,485
5,209
8,825
6,641
6,230
1,199
Max
Max
Timing Model
Preliminary
Unit
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
4–25