MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 149
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MC68000
Manufacturer Part Number
MC68000
Description
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68000.pdf
(480 pages)
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MOTOROLA
(OUTPUT)
(OUTPUT)
NOTE: A "frame" includes opening and closing flags in HDLC and SYNCs in BISYNC and DDCMP.
(OUTPUT)
(OUTPUT)
NOTE: A "frame" includes opening and closing flags, SYNCs, etc.
(INPUT)
(INPUT)
TCLK
(I/O)
RTS
CTS
TXD
TCLK
TXD
RTS
CTS
(I/O)
allel I/O lines in the PACNT register. To cause the TXD and RTS pins to simply
remain high in NMSI1, NMSI2, and NMSI3 modes, use this loopback mode in con-
junction with setting the SDIAG1–SDIAG0 bits in the SIMODE register to loop-
back control.
Figure 4-13. Output Delays from RTS Low, Synchronous Protocol
Figure 4-14. Output Delays from CTS Low, Synchronous Protocol
If an internal loopback is desired when this SCC is configured to a multiplexed
physical interface, then only the SDIAG1–SDIAG0 bits need be set.
When using loopback mode, the clock source for the transmitter and the receiver
(as set in the TCS and RCS bits in the SCON register), must be the same. Thus,
DATA READY TO TRANSMIT HERE
3.5 TCLKS
FIRST BIT OF DATA IN FRAME
CTS SAMPLED AS LOW HERE
MC68302 USER’S MANUAL
FIRST BIT OF FRAME
LAST BIT OF FRAME DATA
LAST BIT OF FRAME
Communications Processor (CP)
CTS MUST NOT BE NEGATED
UNTIL RTS IS NEGATED,
OR A CTS LOST ERROR
WILL RESULT.
4-29
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