MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 74

• Manufacturer Part Number: MC68000
• Manufacturer: MOTOROLA [Motorola, Inc]

System Integration Block (SIB)
3.2.5 Interrupt Controller Programming Model
The user communicates with the interrupt controller using four registers. The global interrupt
mode register (GIMR) defines the interrupt controller's operational mode. The interrupt
pending register (IPR) indicates which INRQ interrupt sources require interrupt service. The
interrupt mask register (IMR) allows the user to prevent any of the INRQ interrupt sources
from generating an interrupt request. The interrupt in-service register (ISR) provides a ca-
pability for nesting INRQ interrupt requests.
3.2.5.1 Global Interrupt Mode Register (GIMR)
The user normally writes the GIMR soon after a total system reset. The GIMR is initially
$0000 and is reset only upon a total system reset. If bits V7–V5 of the GIMR are not written
to specify an interrupt vector prior to the first interrupt condition, the interrupt controller will
pass the vector $0F (the uninitialized interrupt vector), regardless of the interrupt source.
MOD—Mode
IV7—Level 7 Interrupt Vector
IV6—Level 6 Interrupt Vector
IV1—Level 1 Interrupt Vector
3-24
MOD
15
This bit is valid in both normal and dedicated modes.
This bit is valid in both normal and dedicated modes.
This bit is valid in both normal and dedicated modes.
0 = Normal operational mode. Interrupt request lines are configured as IPL2–IPL0.
1 = Dedicated operational mode. Interrupt request lines are configured as IRQ7, IRQ6,
0 = Internal vector. The interrupt controller will provide the vector number for a level 7
1 = External vector. The interrupt controller will not provide the vector number for a lev-
0 = Internal vector. The interrupt controller will provide the vector number for a level 6
1 = External vector. The interrupt controller will not provide the vector number for a lev-
0 = Internal vector. The interrupt controller will provide the vector number for a level 1
1 = External vector. The interrupt controller will not provide the vector number for a lev-
IV7
14
and IRQ1.
interrupt during the interrupt acknowledge cycle.
el 7 interrupt.
interrupt during the interrupt acknowledge cycle.
el 6 interrupt.
interrupt acknowledge cycle.
el 1 interrupt.
IV6
13
IV1
12
11
—
ET7
10
MC68302 USER’S MANUAL
ET6
9
ET1
8
7
V7–V5
5
4
RESERVED
MOTOROLA
0