MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 439

• Manufacturer Part Number: MC68000
• Manufacturer: MOTOROLA [Motorola, Inc]

E.2.1.1 COMMUNICATIONS PROCESSOR (CP) REGISTERS. The CP has one set of
three registers that configure the operation of the serial interface for all three SCCs. These
registers are discussed in the next three subsections.
E.2.1.1.1 Command Register (CR). The command register is an 8-bit register located at
offset $860 (on D15-D8 of a 16-bit data bus). This register is used to issue commands to the
CP. The user should set the FLG bit when a command is written to the command register.
The CP clears the FLG bit during command processing to indicate that it is ready for the next
command.
RST—Software Reset Command (set by the user and cleared by the CP)
GCI—GCI Commands
OPCODE—Command Opcode
BIT 3—Reserved (should be set to zero by the user when the command register is written)
CH. NUM.—Channel Number
FLG—Command Semaphore Flag (set by the user and cleared by the CP upon command
completion)
MOTOROLA
0 = No software reset command issued or cleared by CP during software reset se-
1 = Software reset command (FLG bit should also be set if it is not already set).
0 = Normal operation.
1 = The OPCODE bits are used for GCI commands (user should set CH. NUM. to 10
00 = STOP TRANSMIT Command.
01 = RESTART TRANSMIT Command.
10 = ENTER HUNT MODE Command.
11 = Reset receiver BCS generator (used only in BISYNC mode).
00 = SCC1.
01 = SCC2.
10 = SCC3.
11 = Reserved.
0 = CP is ready to receive a new command (should be checked before issuing the next
1 = Command register contains a command to be executed or one that is currently be-
quence.
and FLG to 1).
command to the CP).
ing executed.
RST
7
GCI
6
MC68360 USER’S MANUAL
5
OPCODE
4
—
3
CH. NUM.
2
1
FLG
SCC Programming Reference
0
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