MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 220
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MC68000
Manufacturer Part Number
MC68000
Description
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68000.pdf
(480 pages)
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Communications Processor (CP)
sion of a block. For the receiver, the ENQ character designates the end of the block, but no
CRC is expected.
Following control character reception (i.e., end of the block), the RCH bit in the BISYNC
mask register should be set, re-enabling interrupts for each byte of received data.
4.5.14 DDCMP Controller
The byte-oriented digital data communications message protocol (DDCMP) was originated
by DEC for use in networking products. The three classes of DDCMP frames are transparent
(or maintenance) messages, data messages, and control messages (see Figure 4-34).
Each class of frame starts with a standard two octet synchronization pattern and ends with
a CRC. Depending upon the frame type, a separate CRC may be present for the header as
well as the data portions of the frame. These CRCs use the same 16-bit generator polyno-
mial as that used in HDLC.
The most notable feature of the DDCMP frame is that the frame length is transmitted within
the frame itself. Thus, any character pattern can be transmitted in the data field since the
character count is responsible for ending the frame, not a special character. For this to work
properly, the header containing the frame length must be protected, causing a need for a
CRC in the frame header.
The bulk of the frame is divided into fields whose meaning depends on the frame type. De-
fined control characters are only used in the fixed-length frame headers (the fields between
the synchronization octets and the first CRC). The following fields are one byte each: SYN1,
SYN2, SOH, RESP, NUM, ADDR, ENQ, DLE, and FILL. The following fields are two bytes
each: COUNT + F, CRC1, CRC2, and CRC3. The DATA field is a variable number of bytes,
as defined in the COUNT field.
DDCMP communications can be either synchronous or asynchronous, with both types using
the same frame format. Synchronous DDCMP frames require the physical layer to transmit
the clock along with data over the link. Asynchronous DDCMP frames are composed of
asynchronous UART characters, which together form the frame. The receiver and transmit-
ter clocks are not linked; the receiver resynchronizes itself every byte using the start and
stop bits of each UART character.
4-100
TRANSPARENT
DATA MESSAGE FORMAT
CONTROL MESSAGE FORMAT
SYN1
SYN1
SYN1
SYN2
SYN2
SYN2
ENQ
SOH
DLE
Figure 4-34. Typical DDCMP Frames
COUNT
COUNT
MESSAGE TYPE AND SUBTYPE
MC68302 USER’S MANUAL
F
F
RESP
FILL
NUM
FILL
ADDR
ADDR
ADDR
CRC1
CRC1
CRC3
DATA (BYTES)
DATA (BYTES)
CRC2
CRC2
MOTOROLA
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